Cell Relay Archive

[guru@deltanet.com (Bill Schultz)]

In <D7AFpo.1xz@melpar.esys.com>, jwills@melpar.esys.com (Jeffrey M. Wills) writes:

[my original post deleted]

:>Bill, could you give us an idea of what you would expect might be 
:>an acceptable latency through a switch.  In many applications
:>I've seen numbers on the order of milliseconds or hundreds
:>of microseconds, which is very low indeed for most ATM switch
:>architectures I know of.
:>
:>Dr Jeff
:>jwills@melpar.esys.com
:>E-Systems, Inc. Ashburn, VA.

Well, the numbers I have seen have also varied all over the map.  Clearly,
however, it is end-to-end latency which is of most importance to the end
user.  Typically that will involve at least two switches, one at each end
of the ATM link, unless somebody has a better way of sharing an ATM
link between voice and data (ask the developers of the voice stuff in the
ATM Forum.....  The standard is just "up in the air.").  Because there does
not seem to be any decent way to feed voice into, say, a cisco router, and
have the router put the voice onto the ATM link, what I am left with is to
use a small ATM switch at each end, with one port on the ATM switch
going to the cisco router and one or more other ports going to the voice
and video boxes.

I have not implemented anything yet; I am still poking around here looking
for the "right" solution.

So, to answer your question as to what is "an acceptable latency" in such
an environment, I would have to answer: something less than one half of
the acceptable end-to-end latency.

What is the acceptable end-to-end latency?  I think for voice use, most
folks are disturbed by satellite hop delays (roughly 250ms), so I would
look for end-to-end latency of under 100ms.  Since most switch vendors
would seem to promise no worse than 20ms per switch for higher priority
cells (given that the higher level control program does not over-burden
a given link with too many higher priority cells), it would appear to me
that I could get "acceptable" latency with even as many as five ATM
switches between ends.  Since it appears that even in the worst case
scenario for the architecture I am considering I would need no more than
three switches between ends, I am operating under the assumption that
I will be able to get the low latency I want without a problem.

This works for me.....

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