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Cell Relay Retreat>List Archive>month:1995-Apr> msg00268



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Re: ATM vendors

  • From: guru@deltanet.com (Bill Schultz)
  • Date: Wed, 19 Apr 1995 18:12:28 -0500, 19 Apr 1995 23:02:30 GMT

In <jfinleyD7Az5M.9rr@netcom.com>, jfinley@netcom.com (John Finley) writes:
:>Bill Schultz (guru@deltanet.com) wrote:
:>: In <D7AFpo.1xz@melpar.esys.com>, jwills@melpar.esys.com (Jeffrey M. Wills) writes:
:>
:>: [my original post deleted]
:>
:>: :> [followup deleted]
:>: :>Dr Jeff
:>: :>jwills@melpar.esys.com
:>: :>E-Systems, Inc. Ashburn, VA.
:>
:>: [deleted]
:>
:>: What is the acceptable end-to-end latency?  I think for voice use, most
:>: folks are disturbed by satellite hop delays (roughly 250ms), so I would
:>: look for end-to-end latency of under 100ms.  Since most switch vendors
:>: would seem to promise no worse than 20ms per switch for higher priority
:>: cells (given that the higher level control program does not over-burden
:>: a given link with too many higher priority cells), it would appear to me
:>: [edited]
:>
:>At 51 Mbits/sec, one cell is about 8.3 usec, so 20 msec represents
:>over 2K cells, assuming the line's at capacity.  I'd have expected a
:>few cells (tens?) worth of buffering for "higher priority" cells; it
:>would seem that getting up to 2K means you're already in trouble.
:>
:>Do current switches really buffer this much?

Yes.  The following paragraph is quoted from the product announcement
for the cisco Hyperswitch A100:

     The switch supports eight MUX/DEMUX blocks, each of which supports up
     to two interface cards.  Each MUX/DEMUX block consists of a 2000-cell
     buffer that is dynamically partitioned into 34 buffers, one for each output
     port, for each of the two cell delay priority types (variable bit rate (VBR)
     and continuous bit rate (CBR)).  Two queues are also reserved for
     point-to-multipoint connections, one for each cell priority type.

Now, as I read the above, incoming cells go into a 2000 cell buffer where
they wait for time on the switch backbone.  When switch backbone time is
available, the cells get moved from the 2000 cell input buffer to the 2000
cell output buffer.

Now, it is true that the 2000 cells is for two interfaces, but if I need eight
or fewer, don't you think I am going to populate every other one out of
the allowed 16?  Of course I am.....

So, while it is highly unlikely that any given cell would have to wait
through the entire amount of available buffer, it appears that the maximum
latency for the cisco Hyperswitch A100 would be 4000 cells.

That kind of latency is avoided at the higher level traffic management
routines by ensuring that the demand is controlled to some degree.  That is
why the setting of queue rates in the cisco becomes so important.  You
really do not want to cause your cell buffers to become flooded with data
so that there is little or no room for the higher priority voice traffic.

Still, even at that, the higher priority voice traffic ought to find its way
throught the switch with relativly low latency simply because it is given
priority for access to the switch backbone, and again out the transmitting
interface.  So, again, until better information comes along, I am pressing
the "I believe" button about voice over ATM, and pressing on with the
design of my application.

But your underlying point is well taken; it would appear that so long as
the management software does not assign too much voice traffic to any
given switch resource, the priority traffic ought to get through with little
or no difficulty.

The devil, as they say, is in the details.....

/~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|     Bill Schultz     A Warped Mind Is A Terrible Thing To Waste.....
|                                     Use OS/2 Warp: Waste Not, Want Not.....