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Cell Relay Retreat>List Archive>month:1998-Apr> msg00288



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Re: UBR over ATM

  • From: "Richard S. Tsumaki" <richard.tsumaki@trw.com>
  • Date: Tue, 28 Apr 1998 13:56:16 -0700

Thanks to those who took the time to reply.  I'd summarize the responses
but so far there's only two posts and one email (provided on request). 
Basically, Paul Koning's post is the most complete, and Ronald H.
Davis's adds mention of upper layer flow control bugaboos for the last
question.

Yikes, good thing I asked.  From the responses, the following
architecture will work very poorly if at all (please forgive the ASCII
etch-o'-sketch):

U1 <-(a)-> F <-(b)-> |ATM switch <-(b)-> F <-(a)-> F <-(b)-> ATM switch
U2 <-(a)-> F <-(b)-> |                                             .
U3 <-(a)-> F <-(b)-> |                                             .
…
Where Ux= a user PC running LANE client (i.e., UBR SVCs only)
       F= intermediate cell forwarding device operating at PHY layer
     (a)= 256 Kbps line
     (b)= 25.6 Mbps line
Since congestion occurs at F and there's no intelligence about discard,
packets flowing through F would almost certainly be lost.  From the rate
discrepancy at F, buffering alone probably won't be practical.  It looks
like the only thing to save this architecture's bacon is traffic shaping
at the ATM switch (if it'll go that low).  Hopefully that'll push
congestion problems onto the more capable switch instead of F.  Also, 
the same applies to an F between two switches.  Any comments or
suggestions?