Cell Relay Archive[Date Prev][Date Next][Thread Prev][Thread Next] [Date Index][Thread Index][Author Index][Subject Index] Re: Single bit header error correction in ATM Specific TC
Paul Koning wrote:
>
> ATM HEC based framing, for example, does as you describe during
> the syunc phase (no error correction) but then after it's in sync
> doesn't go out until it has seen several consecutive HEC errors.
> So it's quite safe to turn off error correction, because occasional
> single bit header errors then merely cause cell loss, not loss
> of sync. And obviously the packet loss rate resulting from
> that header error based cell loss is at most about 10% of the
> total, assuming random errors.
>
error correction is not "on" full time in atm. for instance, error
correction is not done on successive cells. when a cell error is
detected and corrected, physical layer goes from the "correction"
state to the "detection" state (while staying in sync). in the
detection state cells with single bit errors get pitched.
so if you have a facility with reasonable ber performance, the
probability that multiple errors will alias as a single bit error
should be miniscule. adding to that the fact that error correction
is not performed on consecutive cells, i don't see any particular
advantage in turning off error correction unless the ber performance
of the physical medium is questionable.
--
__ ______ __ / __/ | lucent technologies, naperville il, usa
_/ (_(_) / (_(_/_/_(_/ . ronald.h.davis@lucent.com
author of "atm for public networks" published by mcgraw-hill
http://www.amazon.com/exec/obidos/ASIN/0071344764
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