Cell Relay Archive

Cell Relay Retreat>List Archive>month:1999-Oct> msg00021



[Date Prev][Date Next][Thread Prev][Thread Next]  
  [Date Index][Thread Index][Author Index][Subject Index]

Re: Single bit header error correction in ATM Specific TC

  • From: "ronald h. davis" <ronaldd@lucent.com>
  • Date: Fri, 08 Oct 1999 16:58:35 -0500
  • Organization: lucent technologies


Paul Koning wrote:
> 
> "ronald h. davis" wrote:
> > 
> > so if you have a facility with reasonable ber performance, the
> > probability that multiple errors will alias as a single bit error
> > should be miniscule.  adding to that the fact that error correction
> > is not performed on consecutive cells, i don't see any particular
> > advantage in turning off error correction unless the ber performance
> > of the physical medium is questionable.
> 
> That's one way of looking at it.  Another way of looking at it
> is that the single bit correction performs no useful function
> because it doesn't significantly affect the packet loss rate
> seen by the application.  (The story may be different for
> non-packet data, admittedly.)
> 

why do you say that?  for instance, if you are carrying packet traffic
you definitely want to avoid losing cells since loss of a single cell
means loss of the entire packet.  if the application is a tcp
application there may also be implications for tcp over atm
performance.

i would have thought that a tcp over atm situation is one in which
you would want to perform header correction.

-- 
  __  ______  __  / __/ |       lucent technologies, naperville il, usa
_/ (_(_) / (_(_/_/_(_/  .       ronald.h.davis@lucent.com
author of "atm for public networks" published by mcgraw-hill
     http://www.amazon.com/exec/obidos/ASIN/0071344764