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Re: CR: ATM cell scrambling

  • From: Rajagopalan K <rajagopalan.kot@wipro.com>
  • Date: Tue, 25 Jan 2000 16:23:35 +0530
  • Organization: Wipro Technologies, Global R&D

Scrambling is done to improve clock recovery. PLL which is used
to recover clock in the receiver from the clock-encoded data,
needs to be corrected frequently to get a better stability. If
we get all zeros or all ones over the link, it would affect the
clock recovery. All zeros pattern is avoided by line coding
techniques like B8ZS, HDB3, B3ZS etc. All ones pattern will
still result in toggling over the link by the use of AMI.

But if u want to get still better randomization of data sent
over the link so as to aid clock recovery (which inturn
favors reliable data detection), Scrambling is recommended.
I.432 recommends to use self-synchronizing scrambler for
DS1/E1, for SDH-based physical layer and for cell-based, it is
distributed sample scrambling. We have frame-synchronous
scrambler too for SONET but it is having security problems
for non-byte-interleaved applications where malicious users
could harm clock recovery. So RFC2615 "PPP over SONET/SDH"
recommends self-synchronizing scrambler.

If u want the internals of scramblers, refer to the book :
 "Scrambling techniques for Digital Transmission" by
Byeong Gi Lee and Seok Chang Kim, Springer-Verlag.

Hope it helps,
Raj

sripriyar@my-deja.com wrote:

> Hello Everybody,
> What is the practical application of cell scrambling on links below DS3
> speeds? (I.432 does not define the application of ATM over these
> physical interfaces whereas it does for SONET and DS3.) Do DSL, T1 and
> E1 links require that this scrambling be applied?
>
> How extensively is ATM cell scrambling used in the real world?
>
> Regards
> Sripriya
>
> Sent via Deja.com http://www.deja.com/
> Before you buy.

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