Cell Relay Archive

[Marc Delvaux <mdel@globespan.net>]

albert.e.manfredi@boeing.com wrote:

> In article <86hsvf$j1c$1@nnrp1.deja.com>,
>   sripriyar@my-deja.com wrote:
> > Hello Everybody,
> > What is the practical application of cell scrambling on links below
> DS3
> > speeds? (I.432 does not define the application of ATM over these
> > physical interfaces whereas it does for SONET and DS3.) Do DSL, T1 and
> > E1 links require that this scrambling be applied?
> >
> > How extensively is ATM cell scrambling used in the real world?
>
> ATM and SONET each uses scrambling rather than other methods (such as
> 4B/5B or Manchester encoding) to minimize DC bias. Which means that ATM
> over SONET scrambles twice. Using scrambling, you avoid having a clock
> rate that is faster than the bit rate. One symbol over the wire is one
> bit of information.

  In my view, ATM scrambling is used to ensure correct cell delineation
even
in the presence of so called malicious user, and not for DC bias.  In SONET

scrambling is used to ensure a minimum of transitions for clock recovery
purpose
and to ensure correct frame delineation against malicious users.  DC bias
could also
be important but less so for the optical links that are normally used in
SONET.

>
>
> So there is no issue with link speed. I expect that when we do send ATM
> cells over DSL, the bits will be scrambled over DSL, as they are over
> other media. Maybe someone has a different view?

  Yes, correct.  It is customarily to include ATM cell scrambling using the

X^43+1 scrambler in most ATM-TC layer for the reasons explained above.
At HW level, most chips give you the possibilty to turn scrambling on or
off.
This may be seen as a good or bad thing (it ensures that the HW will
support
both, but it allows the SW to mess upon something that should be defined
by standard, not by local preferences), such is life.


>
>
> --
> Bert
> albert.e.manfredi@boeing.com
>
> Sent via Deja.com http://www.deja.com/
> Before you buy.