Cell Relay Archive

["Rajagopalan K" <rajagopalan.kot@wipro.com>]

U can refer to the following book:
  "Scrambling Techniques for Digital Transmission",
  Byeong Gi Lee and Seok Chang Kim,
  Springer-Verlag, ISBN 3-540-19863-6 / ISBN 0-387-19863-6

As far as the verilog equation goes, Please check the
following.

for scrambling in the transmit direction (bit serial),

        in ------>  2-input ---------> Out
               +->  XOR          |
    out_pre[43]|                 |
               +--- 43 FFs <-----+

"in" is unscrambled cell and "out" is scrambled output.

         assign out = tx_payload_xsfer_on ?
                      (in ^ out_pre [43]) : in ;

         always @(posedge clk)
         begin
            if (tx_payload_xsfer_on)
               out_pre [43:1] <= {out_pre [42:1], out} ;
            else
               out_pre <= out_pre ; // dont feed out into scr
         end

tx_payload_xsfer_on is active when payload bits are being sent
and inactive during header bits coming over "in".

For the descrambler, it is

        in ---------------------->  2-input -----> Out
               |              +-->  XOR
               |              |
               +--- 43 FFs ---+

 "in" is scrambled cell coming serially and out is the
descrambled output.
(Note that this is a feed-forward circuit unlike the
 feedback circuit in the transmit side)

       assign out = rx_payload_xsfer_on ?
                    (in ^ in_ff [43]) : in ;

       always @(posedge clk)
       begin
          if (rx_payload_xsfer_on)
             in_ff [43:1] <= {in_ff [42:1], in} ;
          else
             in_ff <= in_ff ; // dont feed into descr
       end

Mathematically,
 the scrambled output is Y(K) = X(K) ^ Y(K-43)
 the descrambled output is Y(K) ^ Y(K-43)
                         = X(K) ^ Y(K-43) ^ Y(K-43)
                         = X(K)
The descrambler is a feed-forward circuit and the scrambler
being feedback one. All it needs for descrambler to
synchronize is just 43 bits of error-free payload bits.

Hope it helps,
Raj



Funda Kutay wrote:

> Hello,
>
> I am looking for information about how
> 1 + x^43 scrambling/descrambling is done.
> I myself made a verilog code to understand  it.
> But it seems I am missing some points.
>
> Thank you for the help.
>
> Funda

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