Cell Relay Archive

["D. Mark Durrett" <mark_durrett@netedge.com>]

Hello Ken,

Your number 2 guess is closest.

The CRC calculation is usually done on the fly as a packet is being
reassembled.  This is performed byte-wise one cell at a time, and 
an intermediate value is stored in memory until the next cell belonging
to that PDU arrives.  When that cell arrives, the earlier intermediate
result is retrieved from memory (the lookup is based on the VC), loaded
into the CRC circuitry as a seed, and the current cell's bytes are run
throught the circuitry.  At the end of that cell, the new intermediate
value is stored back into memory.  Of course, this carries on until the
end of packet is reached, at which time the result is compared with the
CRC value appended to the PDU.

This entire operation is usually performed by the Segmentataion and 
Reassembly (SAR) chip on the adapter card.  This is one of many
operations which the Reassembly circuitry must perform on the fly. All 
such operations are based on a packet descriptor which is temporarily 
stored in the SAR's memory.  This descriptor is fetched each time a cell
with a VCI/VPI matching that descriptor arrives.   The descriptor
contains fields for such things as:
1. pointer to the start of a memory buffer (where the packet should be 
   placed in memory)
2. pointer to the location where the last byte of the previous cell was
   written (assuming one has already been received)
3. intermediate value of CRC.
4. maximum acceptable length of the PDU
5. reassembly timeout value
6. AAL type (if the SAR supports more than just AAL5)

I hope this helps you to understand the function better.

Cheers!

Mark

Ken Christensen wrote:
> 
> Can anyone tell me where and how the AAL5 packet (EPDU) CRC32 is
> computed in an ATM adapter?  Every AAL5 packet has a CRC32 appended to
> it before segmentation into cells.  On the receive side, after
> reassembly of the packet the CRC32 is checked before passing the packet
> "up".  I can see several ways to compute AAL5 packet CRCs...
> 
> 1) Have a separate AAL5 packet CRC circuit per each VC.  Yuck, lots of
> redundant hardware.
> 
> 2) Have a single CRC circuit and "context swap" the CRC circuit shift
> register value for each cell of a diffent VC.  Rather complex?
> 
> 3) Assemble the packet on the adapter and then compute the CRC when
> transfering to host memory.  OK, but this means lots of VC buffers on
> the ATM adapter are needed.
> 
> 4) Compute the CRC32 in software on the host.  Yuck.  This burns lots of
> host CPU cycles.
> 
> So, which one of the above is implemented in "typical" ATM adapters?
> Or, if none of the above... what is it?
> 
> Thanks!!!
> 
> ---
> Ken Christensen
> http://www.csee.usf.edu/~christen

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	D. Mark Durrett		Phone:  919-991-9036
	NetEdge Systems Inc.    FAX:	919-991-9060
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