Cell Relay Archive

[Marc Delvaux <mdel@globespan.net>]

Alan Chan wrote:

> Hi,
>
> I need to implement a Distributed Sample Scrambler descrambler (as specified in
> ITU-T Recommendation I.432) in an ASIC chip. Can anyone suggest some good books
> or articles on this topic?

  Because the DSS operation is quite difficult to grasp, the I.432 goes to great
length in
showing how it may be implemented (at least the part about how to recover and use
the scrambler bits).  You did read Annex C of I.432, didn 't you?  The modified
HEC
delineation is not different from the usual one and is not that daunting.

  I was wondering if you had problems with the principle itself, or with the
implementation.
If i rememger correctly, you already have HEC delineation (I contacted your
company for
the PCI to UTOPIA device) so the HEC part should be well known.

  May I ask which application is targeted, as far as I know the DSS is not really
popular.
The advantage it provides versus standard HEC is quite limited but is
significantly more
difficult to implement (and somebody probably had a bad trip when he decided to
use two
non time adjacent bits).  The only application I know of where for some APON
system
that was treated as a clear channel interface.

>
>
> Thanks
> Alan